High Impedance Differential Clock Divider
Alliance Support Partners, Inc. (ASP)
he ASP-DCD-00 board is a high impedance input clock divider circuit. It is designed to provide minimum load to a clock source for frequency measurement. It accept single ended (Unbalanced) or differential (Balanced) signals with amplitudes as little as 100mV rms; it divides the input signal frequency from 2 to 256 times depending on shunt jumper selections on J3. The board requires 5VDC 500mA power source to operate. The output is capable of driving 5V TTL logic levels.
