Arasan Chip Systems, Inc.
Arasan Chip Systems is a leading provider of Total IP solutions for mobile storage and connectivity applications.
- 408-471-4416
- 408-282-7800
- sales@arasan.com
- 2150 N. First St.
Suite 403
San Jose, CA 95131
United States
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IP Solution
eMMC 5.1
Demand for mobile content capacity and bandwidth for video, pictures and music is ever increasing. To address this demand in the next generation of smartphones, tablets, and portable devices, the eMMC 5.1 Specification from JEDEC, improves the current HS400 speeds operating at 3.2Gbps, with "command queuing" making the data transfers highly efficient by offloading the software overhead into the controller. eMMC 5.1 further improves the reliability of operation by utilizing an "enhanced strobe" at the PHY layer. The eMMC5.1 is backward compatible with the existing eMMC 4.51 and eMMC 5.0 Devices.
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NAND Controller IP
ONFI
Arasan is the leading supplier of mobile storage IP and its products are used by most first tier memory suppliers. Arasan's deep experience with NAND flash memory interfaces and mobile storage standards began in 2001 when it joined the SD Association and shipped industry first SD card IP in 2003. Arasan is a current member of ONFI and JEDEC.
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PCIe End Point IP Core
The Arasan PCI Express End Point is a high-speed, high-performance, and low-power IP core that is fully compliant to the PCI Express Specification 1.1 and 2.0. The IP core is designed for applications in computing, networking, storage, servers, wireless, and consumer electronics. The feature-rich IP core is highly configurable that allows a target design to be implemented with the least number of gates and highest performance.
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Arasan PHY IP
Arasan PHY’s are readily available and in production with multiple foundries from 16nm to 180nm. Our PHY’s are designed for low power on the most advanced nodes for the mobile market while also targeting the automobile market on specialized nodes where extreme temperature tolerance is required.
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Controller IP
ONFI – NAND
Continuous leadership in standards development and extensive customer adoption of previous versions ensures that Arasan has the knowledge and expertise to deliver compliant products with superior customer support. Extensive experience and compliance testing with all versions of ONFI specifications make the choice of Arasan ONFI NAND flash controller the lowest risk approach to implementation of ONFI enabled products. Arasan’s development engineering team provides direct support to customers ensuring that the highest level of knowledge is immediately available to the customer thus reducing problem resolution time.
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EMBEDDED MMC (EMMC)
SD 3.0 / eMMC 4.51 IP Family
The eMMC Host IP is an RTL design in Verilog that implements an MMC / eMMC host controller in an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. The Arasan MMC / eMMC Host IP Core has been widely used in different MMC applications by major semiconductor vendors with proven silicon.
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End Point IP Core
PCIe
The highly configurable PCIe End point IP core supports x1, x2, and x4 lane with a selection of 32/64-bit data path. Depending on design requirements, a maximum of 8 VCs and 8 TCs are supported. The IP core consists of many useful features that can be included to enhance system performance and to address special design needs in different applications. The data link layer allows the configuration of infinite credits to boost the flow control efficiency. By-pass mode, cut-through mode, and store-a...show more -
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Ethernet
Arasan Chip Systems has a complete portfolio of Fast (10/100) Mbps and Gigabit (10/100/1000) Mbps and now 10Gigabit Ethernet IP. Our high quality IP has completed the rigorous interoperability tests at UNH-IOL laboratories and has been widely licensed. Arasan also provides a portable Ethernet driver.
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Total MIPI Solutions
MIPI Standards starting with it's active participation as a Contributor to the MIPI Association in 2004 followed by the launch of the Industry First MIPI IP's the CSI, DSI and D-PHY IP Cores. With over 10 years of MIPI experience, Arasan has the broadest library and foundry history.
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Total Solution
SD 4.1 Family
To meet the ever increasing data transfer rate in high end applications, such as professional broadcasting transmission or advanced high resolution display, the SD 4.1 specification calls out the maximum performance of 1.56 Gbps at UHS-II full duplex mode per lane or half duplex UHS-II at 3.16 Gbps. In real applications, due to the system overhead and different SD 4.1 device controller designs, the actual measured performance can vary dramatically from system to system. With the newly introduced...show more -
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Low speed Serial Interfaces
12C/ 12S/ SPI/ UART
Arasan has a diverse portfolio of connectivity IP products including SPI, I2C, I2S and UART. These protocols are vital for the integration of SoCs with peripheral chipsets in order to form a complete hardware platform. They are frequently used by the SoC to configure, control and gather diagnostic information at the platform level to ensure correct operation of the hardware.Arasan's proven Connectivity IP Solutions provides a risk free path to integrating these interfaces in SoC designs:High qua...show more -
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MIPI Camera Serial Interface
CSI
Arasan provides a Total MIPI CSI-2 IP Solution supporting two options: MIPI CSI-2 v1.2 for D-PHY physical interface only, and MIPI CSI-2 v1.3 for the new MIPI C-PHY v1.0 and D-PHY v.1.1, v1.2, and a future v2.0. Arasan offers the C-PHY in a combination configuration that supports both C-PHY interfaces and D-PHY interfaces. Our implementation makes efficient use of the high frequency signally pins for a minimal overhead to support both physical interfaces.
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MIPI I3C Sensor Controller
I3C
The main purpose of MIPI I3C is to standardize sensor communication, reduce the number of physical pins used in sensor system integration and support low-power, high-speed and other critical features supported by I2C and SPI.
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MIPI PHYs
Arasan MIPI PHY’s are readily available and in production with multiple foundries from 16nm to 180nm. Our PHY’s are designed for low power on the most advanced nodes for the mobile market while also targeting the automobile market on specialized nodes where extreme temperature tolerance is required.
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MIPI Radio Front-End
RFFE
Mobile phone radios have developed into highly complex, multi-band and multi-standard designs that often have multiple radio frequency (RF) signal chains. The MIPI Alliance Specification for RF Front-End Control Interface (RFFE) was developed to offer a common and widespread method for controlling RF front-end devices. The RFFE Master IP core typically resides in the RFIC in a mobile platform, and utilizes the RFFE bus to identify, program and monitor the registers in RF front end Slave devices ...show more
